1. Field of the Invention
The present invention relates to a semiconductor device which can operate at high speed and a method of manufacturing the semiconductor device, as well as an image sensor apparatus and an image reader both having the semiconductor device.
2. Description of the Related Art
As image sensors which read an image and output an image signal in accordance with the image, there are known a MOS type sensor, a CCD sensor and the like. The image sensor is also classified into a compact type image sensor and a close-contact type image sensor.
Whichever the type, the image sensor has higher resolution and lower sensitivity as the light receiving area of each of the light receiving elements which are the constituent elements for the image sensor is smaller. That is, the higher the resolution of an image sensor is, the slower the reading speed becomes. There are two reasons for slower reading speed. The first is the increase of storage time resulting from the lowered sensitivity. The second is the increase of scanning time for scanning all of the light receiving elements.
It is desirable that the resolution of the sensor in a main scanning direction and that in a sub-scanning direction are equal to each other two-dimensionally. If so, the sensitivity of the sensor is inversely proportional to the square of the resolution. Namely, if the resolution is doubled, the sensitivity is lowered to one-fourth.
In designing an image reader, the optical resolution of the reader is, in many cases, determined at the time the image sensor is selected. Therefore, apparatus designers have trouble in selecting an image sensor to be mounted on the image reader in view of optical resolution and reading speed.
An image reader is conventionally provided with switching means for switching over reading concentration and can read an image with a resolution lower than an optical resolution. The switching of reading concentration is, however, carried out by image process such as thinning-out process for changing the sampling concentration of an image signal per unit length or averaging process for averaging image signals after the images are read with the optical resolution characteristics of the image reader. For that reason, the switching of the reading concentration does not substantially change the area of light receiving elements and it still requires lot of reading time.
To remove the above disadvantage, recently disclosed are image sensors switching over reading concentration to a low level, increasing reading speed or improving an S/N ratio by outputting the sum of the signals of a plurality of adjacent light receiving elements (Japanese Patent Application Laid-Open No. 6-276365 and No. 9-205518 and xe2x80x9cISSCC 98, DIGEST OF TECHNICAL PAPERS, p174xe2x80x9d and the like).
FIG. 1 is a circuit diagram showing the structure of a conventional image reader disclosed by the Japanese Patent Application Laid-Open No. 6-276365. FIGS. 2A and 2B are timing charts showing the operation of the image reader shown in FIG. 1. It is noted that FIG. 2A indicates the operation of the reader while images are read with high resolution and that FIG. 2B indicates the operation thereof while images are read with low resolution.
The image reader disclosed by this Japanese Patent Application Laid-Open No. 6-276365 is provided with light receiving elements PD2-m1 and the like, switching elements T2-m1 and the like, control lines G2-m and the like connected to the switching elements T2-m1 and the like, respectively and a driver circuit driving the control lines G2-m and the like, as shown in FIG. 1.
In this image reader, if an image is read with high resolution, one control line is driven simultaneously as shown in FIG. 2A. If an image is read with low resolution, two or more control lines are driven at one time as shown in FIG. 2B. If the control lines are driven as shown in FIG. 2B, signals of two or more light receiving elements adjacent to a common data line are simultaneously outputted and a low resolution image can be obtained without conducting image processing such as averaging process.
In addition, since charges of the two or more light receiving elements are transferred by a single driving operation, the number of driving operations is decreased and reading time is shortened accordingly.
Although reading time is shorter than that for previous image sensors, the light receiving area is not doubled in case of reducing the resolution by half. Therefore, the sensitivity of the reader is nothing more than half as high as that of a low resolution sensor. Further, since a plurality of light receiving elements are switched on once, the mixture of feedthrough noise caused by the switching operation disadvantageously increases.
Meanwhile, in an image sensor according to the Japanese Unexamined Patent Application Publication No. 9-205518, a plurality of light receiving elements are arranged in columns and outputs from the respective rows of the elements are composed and sequentially outputted in a low resolution mode to thereby increase the sensitivity of the sensor in the low resolution mode.
Even with the image sensor disclosed by this publication, the sensitivity is only doubled when the resolution is halved and the sensitivity is nothing more than a half as high as that of the low resolution sensor as in the case of the above publication.
According to xe2x80x9cISSCC98, DIGEST OF TECHNICAL PAPERS, p174xe2x80x9d, a two-dimensional CMOS area sensor is provided with column integrators and column memories on all column output lines and with a global integrator on the final output line of the sensor, whereby the sum of the signals of light receiving elements adjacent to one another two-dimensionally can be outputted.
With this imager, the sum of the outputs from the light receiving elements is obtained two-dimensionally, the sensitivity increases fourfold when the resolution is halved and the same sensitivity as that of a low resolution sensor can be obtained.
Nevertheless, due to its complicated circuit arrangement, the imager has disadvantage of lower yield, the great increase of the chip area and the like. Further, in consideration of the present transistor performance, more fine manufacturing process is required than that for a crystalline silicon LSI and it is quite difficult to adapt this imager to a thin film transistor driving type image sensor.
Moreover, there is disclosed a character reader in which two image sensors, i.e., a high resolution CCD sensor and a low resolution CCD sensor, are installed and the output signals of the two sensors are switched to thereby read characters at high speed with low resolution (Japanese Patent Application Laid-Open No. 6-231301).
The character reader disclosed by this publication is intended to solve the challenges shared among the readers. However, since the two sensors are mounted on the reader, two optical systems or two optical paths are needed. As a result, the reader has disadvantage in that the apparatus becomes larger in size, the number of assembly steps increases and the like. Besides, the reader disclosed by this publication differs from the preceding readers in technical concept.
Further, there is disclosed an image reader consisting of an image sensor in which a plurality of lines, on which a plurality of light receiving elements are arranged in one direction, are arranged in a plurality of sub-scan directions (Japanese Patent Application Laid-Open No. 4-56461). In this image reader, signal charges stored in light receiving elements on the respective lines are line-shifted in sub-scanning direction for every sub-scanning cycle.
There is also disclosed an image reader intended to realize high resolution and high transfer efficiency (Japanese Patent Application Laid-Open No. 4-261258). According to this publication, there are provided a plurality of light receiving elements for conducting photoelectric transfer, color filters having difference spectral characteristics formed on the light receiving elements, respectively, illumination means for illuminating a manuscript, image-forming means for forming an image of the manuscript the light receiving elements and signal conversion means for converting electric signals from the light receiving elements to signals of three primary colors on the image reader. The image reader resolves a scanning line of the original into a plurality of pixels and outputs a color signal per pixel. The first color filter is formed on the light receiving elements of the same number as that of pixels. Color filters other than the first color filter are formed on the light receiving elements less than the pixels. A circuit for conducting interpolation operation from electric signals corresponding to the color filters other than the first color filter is provided in the signal conversion means.
As a semiconductor device in which semiconductor elements are formed on an insulating substrate, there is conventionally known a semiconductor device in which thin film transistors using a polycrystalline silicon film are formed on a glass substrate. This semiconductor device, which employs a glass substrate, is applicable to an optical device such as a liquid crystal display device. The semiconductor device is advantageous in that a cost is low, the parasitic capacitance of wirings is quite low, and chip size is less limited and the like.
An image sensor using the above semiconductor device is disclosed by, for example, Japanese Patent Application Laid-Open No. 60-22881. FIG. 3 is a block diagram showing a conventional image sensor disclosed by Japanese Patent Application Laid-Open No. 60-22881.
The conventional image sensor shown therein is a one-dimensional close-contact type one. The image sensor is provided with a scanning circuit 101 having a thin film transistor, a switch 105 formed of a thin film transistor and a semiconductor light conductive film. The thin film transistor is formed by using polycrystalline silicon on an insulating substrate. An element 102, a switching circuit 103 and a light sensitive cell 104 are also formed in the image sensor. The chip size of the image sensor is set at, for example, 30 cm in lengthwise direction of the sensor.
A serious problem, however, occurred when the inventor of the present invention tried to manufacture such an image sensor on a glass substrate and to operate it. The image sensor manufactured by the present inventor will be described. FIG. 4 is a block diagram showing the structure of the image sensor manufactured by the present inventor. FIG. 5 is a cross-sectional view showing the structure of the image sensor.
This image sensor is a one-dimensional close-contact type one in which a circuit is formed on a glass substrate of 1.1 mm in thickness. The size of a chip in lengthwise direction of the image sensor is 120 mm and that in breadthwise direction thereof is 2 mm. A CMOS scanning circuit 101 made of polycrystalline silicon thin film transistors, switches 105 made of polycrystalline silicon thin film transistors and photodiodes 113 made of amorphous silicon thin films are formed on the circuit of this image sensor. The scanning circuit 101 is basically the same as a shift register. The output signals of the respective stages of the shift registers are inputted to gate terminals 114 of the switches through buffers. Using the output signals, the corresponding switches are on/off controlled. The number of scanning stages of the scanning circuit 101, i.e., the number of photodiodes is 864. The image sensor includes parasitic elements C1 to C8 and Cgd, which will be described later.
An I-V converter 111 is connected as an initial stage amplifier to the output terminal 115 of the image sensor constituted as stated above and an integrator 112 is connected to the output of the I-V converter 111.
As shown in FIG. 5, at the time of manufacturing the above-stated image sensor, a silicon oxide film 121 was formed on a glass substrate 120 of 1.1 mm in thickness. A thin film transistor 123, including a polycrystalline silicon film 100 as an active layer, is formed on the silicon oxide 121. Next, a gate electrode 124 for the thin film transistor 123 is formed and the gate electrode 124 is covered with an interlayer insulating film 125 made of a silicon oxide film. A photodiode 126 is formed on the interlayer insulating film 125 in a region different from that of the thin film transistor 123. Thereafter, these elements are connected to an aluminum wiring 128 and a passivation film 127 is formed on the entire surface.
Reference symbol xe2x80x9ca-Sixe2x80x9d denotes a-Si:H (amorphous silicon). Reference symbol xe2x80x9ca-SiCxe2x80x9d denotes P+-a-SiC:H (P+ amorphous silicon carbide). Since P+-a-SiC:H film is formed to be coupled with a-Si and deposited by 400 angstrom, the P+-a-SiC:H thinly covers a-Si.
The system of the fundamental operation of the image sensor constituted as described above is a so-called storage system in which a reverse bias is applied to a photodiode and charge according to exposure quantity is read in the next scanning. If the output signals of the respective stages of the 864-bit shift registers are sequentially outputted, switching transistors are sequentially selected and charging currents of the respective photodiodes are carried across an output line. Signals each obtained by integrating the charging current for every stage are the charge stored in the photodiodes according to exposure quantity. Therefore, the output signals of the integrator become signal levels proportional to exposure quantity.
The inventor of the present invention assembled an image sensor module using the above-stated image sensor and causes the module to read images of a print. FIG. 6 is a typical cross-sectional view showing the image sensor module assembled by the inventor.
The image sensor module is provided with an image sensor 110 as constituted above, a light source 130 arranged on the back side of an image sensor substrate, an optical fiber array plate 131 bonded onto the light receiving surface of the image sensor with an adhesive agent 136, a roller 132, a printed board 133 and a case 134. An ITO (indium tin oxide) film 135 is deposited on the surface of the optical fiber array plate 131 for preventing noise and the film 135 is grounded. Photodiodes 113 are formed on the image sensor 110 and optical fibers 223 arranged on the base glass 222 are provided on the optical fiber plate 131.
In the image sensor module constituted as stated above, light from the light source 130 arranged on the back side of the image sensor 110 is permeated by the image sensor substrate serving as a glass substrate and illuminates a manuscript (not shown) through the optical fibers 223. The light reflected by the original is quantized in units of optical fibers 223 and transmitted to the respective photodiodes 113 of the image sensor 110.
The image sensor module reads information on the manuscript by sub-scanning the original in the rotation direction of the roller. The detailed structure of this module is described in Japanese Patent Application Laid-Open No. 6-291935.
When the inventor of the present invention drove the image sensor module constituted as described above, the following problems occurred.
First, the output of the initial stage amplifier 111 connected to the output terminal 115 of the image sensor 110 is saturated by impulse noise synchronous with the transition of a clock signal. Due to this phenomenon, the gain of the initial stage amplifier is limited. This requires decreasing gain not to saturate the output. To decrease gain normally causes the reduction of the S/N ratio.
Second, as for the output signal of the integrator 112, fixed pattern noise (even and odd number signal difference: Qs) in which the output signals of the even-number stages and those of the odd-number stages of the image sensor split, appears and the even and odd number signal difference Qs varies. This variation will be expressed by xcex94Qs hereinafter. If the variation occurs, stripe noise appears on the image.
FIG. 7 is a graph showing the waveforms of the output signal of the image sensor. In FIG. 7, the output waveform of the integrator from tenth to thirteenth stages when a blank manuscript is read and the waveform of clocks supplied to the scanning circuit. As shown in FIG. 7, the output of the even-number stages differs from that of the odd-number stages. The features of this phenomenon indicates that the above-mentioned problems are caused by the mixture of noise through parasitic elements.
The parasitic elements C1 to C8 and Cgd shown in FIG. 4 are main parasitic capacitances in the image sensor. After the inventor conducted analysis in detail, he discovered that the capacitance C1 between a clock 1 wiring 140 and an output wiring 142 and the capacitance C2 between a clock 2 wiring 141 and an output wiring 142 caused the above problems. That is, the inventor discovered that large clock noise got mixed in the output wiring 142 through the parasitic capacitances C1 and C2.
FIG. 8 is a typically perspective view showing the layout of the wirings on the image sensor shown in FIG. 4. The layout shows that the clock 1 wiring 140, clock 2 wiring 141 and output wiring 142 are all connected to and extended through the first to 864th stages of the image sensor. These wirings are normally called bus-lines. The wirings 140, 141 and 142 are parallel and have almost the same length as the lengthwise size of the image sensor 110. Thus, as the sensor is longer in lengthwise direction, the parasitic capacitances of the wirings increase proportionally. To be specific, the values of the parasitic capacitances C1 and C2 were 840 fF and 605 fF, respectively.
A clock signal has amplitude of 5V. The clock 1 signal is opposite in phase to the clock 2 signal. The charge applied to the output wiring 142 through the capacitance C1 at the rise of the clock 1 signal is as follows:
5(V)xc3x97840(fF)=4200(fC).
Meanwhile, the charge applied to the output wiring 142 through the capacitance C2 is as follows:
xe2x88x925(V)xc3x97605(fF)=xe2x88x923025(fC).
Therefore, charge of 1175 fC is consequently superimposed on an output signal.
Since the output signal of the next stage is outputted at timing at which the clock 1 signal falls, a phenomenon opposite to the above occurs and charge of xe2x88x921175 fC is superimposed on an output signal. The inventor of the present invention discovered that this caused the even and odd number signal difference Qs. Further, the application of the large charges was the main cause for the saturation of the output signal of the initial stage amplifier by the impulse noise synchronous with the transition of the clock signal.
The signal charge quantity tends to be smaller and smaller so as to meet demand for high-speed image readout. The noise charge of 1175 fC shown above corresponds to one to ten times as large as signal charge, which causes a serious problem.
As stated above, the quantity of charge applied to the output wiring 142 from the clock wirings 140 and 141, that is, the values of the products of the clock amplitude voltage and capacitance values of the parasitic capacitances C1 and C2, respectively are quite high compared with the output signal charge quantity. Although the clock wirings 140 and 141 are driven by clock signals opposite in phase and noise is slightly cancelled, noise is not canceled sufficient due to the difference between the parasitic capacitances C1 and C2. Even if the values of the parasitic capacitances C1 and C2 are accurately matched with each other, the charge quantity mixed in the capacitances C1 and C2 is easily changed due to the variation of the clock amplitude voltage, with the result that the noise cannot be canceled.
The cause which makes the above problems more complicated is that these parasitic capacitances C1 and C2 are formed in a wide space around the sensor. FIG. 9 shows the equipotential and the electric line of force resulting from the parasitic capacitances present between the clock 1 wiring and the output wiring while the image sensor is floated in the air. The potential of the clock 1 wiring 140 is set at 5V and those of the remaining wirings such as wiring 142 are set at 0V.
If wirings are formed on an insulating substrate such as a glass substrate, a ground potential surface does not exist. Owing to this, capacitances are parasitized through the interior of the glass substrate serving as a dielectric, the air of the back surface of the glass substrate, that of the surface of the sensor and the like.
In the above-stated image sensor, the electric line of force indicated by a broken line spreads wide through the space of the outside of the image sensor as shown in FIG. 9. This means that the values of the parasitic capacitances C1 and C2 easily vary according to the influence of objects existing in the space outside the image sensor.
FIG. 10 shows the equipotential resulting from the parasitic capacitances present between the clock 1 wiring and the output wiring if a ground metal plate is provided on the back side of the image sensor shown in FIG. 9. Compared with a case where the image sensor is floated in the air, the state of the equipotential greatly varies and the values of the parasitic capacitances C1 and C2 greatly vary as well.
The values of the parasitic capacitances C1 and C2 are shown in Table 1 below.
The capacitance values increase threefold.
The variation xcex94Qs of the even and odd number signal difference Qs occurs when the scanner module 161 is made closer to the ground metal plate 160 or away from the plate 160 as shown in FIG. 11. The values of the parasitic capacitances C1 and C2 these times are shown in Table 2 below:
As can be seen from the Table 2, if the values of the parasitic capacitances C1 and C2 vary, the difference between the values vary as well and the variation xcex94Qs of the even and odd number signal difference Qs occurs.
In this way, the causes of the problems with the conventional image sensor are: the coupled capacitance between wirings is large; and the capacitance value varies. Normally, if a circuit is formed on an insulating substrate, the wirings are not strongly coupled with the substrate and the coupled capacitance between the wirings, therefore, becomes large. FIG. 12A is a typical view of a model showing that parallel wirings are formed on a silicon substrate. FIG. 12B is a typical view of a model showing that parallel wirings are formed on a glass substrate.
As shown in FIG. 12A, if two parallel wirings 170 and 171 are formed above a silicon substrate 173 to be distant from each other by 5 xcexcm through an insulating film 172 of 1 xcexcm, the capacitance value of the wirings is 117 pF/m.
On the other hand, as shown in FIG. 12B, if parallel wirings are formed on a glass substrate in a space in which other conductors are not present, the parasitic capacitance value of the wirings is 12 pF/m.
As can be seen from the above, the parasitic capacitance value of the wirings in the model shown in FIG. 12B is smaller. As for the capacitance between the wirings which causes cross-talk, however, the capacitance in the model of FIG. 12A is 1.5 pF/m and that in the model of FIG. 12B is 12 pF/m, so that the capacitance in the model of FIG. 12B is eighth as large as that in the model of FIG. 12A.
This problem also occurs to devices other than an image sensor, e.g., a liquid crystal display device on which driver circuits are formed on a single substrate.
The inventor of the present invention discovered that noise generated from the clock signal wirings easily get mixed in other wirings in the semiconductor device on which semiconductor elements are formed on an insulating substrate, which causes serious problems, as described above.
It is, therefore, an object of the present invention to provide a semiconductor device operating at high speed with less noise and a manufacturing method thereof, as well as an image sensor apparatus and an image reader both having the semiconductor device.
According to one aspect of the present invention, a semiconductor device may comprise an insulating substrate, a first semiconductor element region having a digital signal wiring formed on the insulating substrate, a second semiconductor element region having an analog signal wiring formed on the insulating substrate, and a shield electrode provided at least one of above and below only the first semiconductor element region out of the first and second semiconductor element regions.
According to another aspect of the present invention, an image sensor apparatus may comprise a substrate and a plurality of light receiving element groups formed on the substrate. The plurality of light receiving element groups differs in light receiving area from one another.
According to the present invention, an image signal from a light receiving element having an optimum light receiving area in main-scanning and sub-scanning directions in accordance with the selected resolution. Therefore, if the resolution of the sensor apparatus is lowered to 1/R, the sensitivity thereof increases to about the square of R.
According to the present invention, the number of light receiving element arrays should not be always specified to a specific number and two or more types of light receiving arrays can be used.
Further, in the present invention, a plurality of light receiving elements forming a light receiving array are desirably arranged in a row in a main-scanning direction, i.e., a direction coincident with the width direction of a recording medium such as a manuscript, however, the arrangement of the light receiving elements is not necessarily limited thereto.
Moreover, in the present invention, it is preferable that an appropriate protective member protecting the light receiving elements is provided between the light receiving element array and a recording medium such as a manuscript with which the array comes into direct, close contact. In addition, the portion of the protective member which faces the light receiving element array is preferably provided with an opening portion, a honeycomb structure or a light transmitting part formed by arranging a bundle of optical fibers. With this constitution, sufficient illumination applied from the above of the image sensor is supplied to the recording medium.
The image sensor apparatus may comprise a drive output circuit provided with shift registers sequentially selecting a light receiving element to be driven out of the light receiving elements at predetermined timing, a light receiving element array selection control circuit selecting a predetermined light receiving element array from the plurality of light receiving element arrays, a decoder circuit outputting a light receiving element selection signal for selecting the light receiving element based on output signals of the drive output circuit and the light receiving element array selection control circuit and pixel switches selectively driving the light receiving elements based on an output signal of the decoder circuit. In this case, the pixel switches and the like may be formed around the light receiving elements on the substrate simultaneously with the formation of the light receiving elements. Also, they may be arranged on the peripheral portion of the substrate.